Non-volatile memory is an integral part of many electronic devices from mobile phones, digital cameras, and set-top boxes, to automotive engine controllers primarily because of its ability to store data even when power is turned off. One type of non-volatile memory, namely, phase change memory (PCM), is aimed at eventually supplanting flash memory technology which is used abundantly in such electronic devices. Modern phase change random access memory (PRAM) typically requires that a PCM cell employed therein be compatible with existing field-effect transistor (FET) technology. However, PCM cell volume must be very small so as to ensure that set and reset currents in the PCM cell are smaller then a maximum FET current, which is difficult to achieve using present complementary metal-oxide semiconductor (CMOS) fabrication technology, such as, for example, a 90 nanometer (nm) process.
As is known, PCM cells are generally based on storage elements which utilize a class of materials, such as chalcogenides, that has the property of switching between two distinct states, the electrical resistance of which varies according to the crystallographic structure of the material. A high-resistance, reset state is obtained when an active region of the phase change (PC) material is in an amorphous phase, whereas a low-resistance, set state is obtained when the PC material is in a crystalline or polycrystalline phase. The PC material can be selectively switched between the two phases by application of set and reset currents to the PCM cell.
Reducing the amount of current required by a PC material layer to change its crystalline phase can beneficially decrease power dissipation and improve reliability during operation of the PCM cell. Consequently, attempts have been made to define current flow in the PCM cell so as to provide more efficient self-heating (e.g., Joule heating) of the PC material in the cell. Existing solutions for defining current flow in a PCM cell, which in turn defines an active PCM cell volume, rely predominantly on pushing lithography and etching capabilities to their limits. Presently, existing lithography, including, for example, deep ultraviolet (DUV), e-beam, etc., is limited to a line resolution of about 45 nm. Such lithography techniques are already challenging, especially when forming small features having an island shape (preferably circular).
In particular, one of the smallest elements in a conventional PCM cell is a heater which is typically located on one side of the PC material. The small heater is often challenging to manufacture, and thus adds significantly to the cost of the PCM cell. A conventional technique for forming the heater requires a trim of a photoresist mask to ⅓ of the size of the lithography node. Such an aggressive trim is not very reliable and is difficult to control in a homogeneous fashion over a wafer.
Accordingly, there exists a need for improved techniques for defining current flow in a PCM cell that does not suffer from one or more of the problems exhibited by conventional PCM cells.